The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a capacitor in a semiconductor device.
As semiconductor devices have become highly integrated and the minimum line width has decreased, the surface area on which a capacitor is formed has also decreased. However, a capacitor in a cell still has to maintain the minimum required capacitance per cell even as the surface area has decreased. Various methods have been developed to form such a capacitor having a small surface and a high capacitance. The methods include using a high-k material such as tantalum oxide (Ta2O5), aluminum oxide (Al2O3), or hafnium oxide (HfO2) instead of using silicon oxide layer (∈=3.8) and nitride layer (∈=7). The methods also include forming a three-dimensional bottom electrode (e.g., cylinder type or concave type) to effectively increase the surface of the bottom electrode, and increasing the effective surface area of a bottom electrode by 1.7 to 2 times through growing meta stable-polysilicon on the effective surface area of the bottom electrode. A bottom electrode isolation process is generally required when fabricating the aforementioned cylinder type or concave type capacitor. Generally, an etch-back process is used.
FIG. 1 illustrates a cross-sectional view of a semiconductor device after a typical bottom electrode isolation process is performed using an etch-back process. Patterned inter-layer insulation layers 12 are formed over a substrate 11. Storage node contact plugs 13 are formed in the patterned inter-layer insulation layers 12 to contact predetermined sections of the substrate 11.
Patterned etch stop layers 14 and patterned sacrificial insulation layers 15, including open regions 16, are sequentially formed over the storage node contact plugs 13 and the patterned inter-layer insulation layers 12. Bottom electrodes 17 are formed in the open regions 16. The bottom electrodes 17 are formed by an isolation process using an etch-back process. The bottom electrodes 17 contain titanium mononitride (TiN). However, upper portions of the bottom electrodes 17 may develop a sharp spire when the etch-back process is used as the bottom electrode isolation process (refer to reference letter ‘A’). These sharp spires maintain their shape through a full dip-out process for forming a subsequent cylinder type capacitor. The sharp profile of the bottom electrodes functions as a leakage source for the capacitor when a subsequent dielectric layer and upper electrodes are formed, decreasing the leakage characteristic of the capacitor.
FIG. 2 is a micrograph view illustrating the limitations caused by the typical method. The micrograph shows a profile of a bottom electrode after a bottom electrode isolation process is performed. Upper portions of the bottom electrode remain in a sharp spacer form as denoted with the reference letter ‘B’. The sharp form is generated when exposed portions of the bottom electrode are etched at a faster rate than portions of the bottom electrode contacting a sacrificial insulation layer during an etch-back process.